He is a tenure-track faculty, leading the Secure and Sustainable System Scaling Lab at Helmholtz Institute Center of Information Security (CISPA). His current research aims enabling secure and sustainable system scaling as chips get denser and many users share chips. They push the boundaries of secure and sustainable system scaling via conducting research on high-performance, energy-efficient, and secure computer architectures and systems.
ICS '26: Proceedings of the 40th ACM International Conference on Supercomputing Clutch: High Performance Vector-Scalar Comparison using DRAM via Chunked Temporal Coding
ACM International Symposium on Computer Architecture (ISCA) DeJaVu: Why You Should Write to Your DRAM Rows Twice, Carefully
IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) ScaleDisturb: Exploiting Temporal Asymmetry to Amplify Read Disturbance in Modern DRAM Chips
Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture
IEEE/ACM International Symposium on Microarchitecture (MICRO) ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems